Abstract: A double-precision decimal floating-point multiplier unit based on FPGA technology is given in this paper.It is a new revision according the IEEE-754r standard.It uses Signed-Digit radix-4 algorithm and new BCD coding techniques for the decomposition of decimal floating-point computing.Compared with the commen single-precision binary floating-point unit,it is wider computing,higher accuracy and wider application.The design takes advantage of the revision of new standard,and decimal floating-point multiplier unit has broad applicability.All these make this model have some practical value in medical,financial and image processing.