Abstract: The Twofish algorithm is one of the final five candidate's algorithms for the AES encryption standard.In this paper,follow the similar of the algorithms in different key length,we designed a time-multiplexed Twofish encryption / decryption processing unit based on SOPC technology.In order to optimize the hardware structure of the target without compromising the safety of the original premise,we revised the design of S-boxes.Compared with the traditional system,it encryption speed faster and consume fewer resources,and so on.This design uses VHDL hardware description language,and layout and wire on Quartus Ⅱ8.0.And then encapsulation this processing unit into an independent IP-core,attached to the Altera Nios-Ⅱ system,and eventually downloads to Altera EP2C20F484C6 target chip for validation.