Abstract: In this paper,we study the implements a data rate that can be adjusted,m series can be equipped with pseudo-random series of sequence generator.This design in the basis of linear feedback shift register,through the linear feedback function to produce mould the longest m sequence.In order to carry on it,we use the hardware description language VHDL,take advantage of the FPGA reconfigurability and flexibility,using Quartus Ⅱ 8.0 for the integrated wiring,and give the ModelSim simulation waveforms.For the sake of verifying the feasibility of this design,we adapt it to the DE2 board,and with an oscilloscope and other equipment were tested.