Abstract: It is presented the asynchronous FIFO memory structure and its applications.It was analysised the asynchronous FIFO memory flags logic design and eliminate metastability.It is proposed an approach based on FPGA chips by using Grey code to address coding solution asynchronous reading and writing of the ideas and methods clock,and show a code of VHDL.The method has portability strong,efficient features which can be widely used digital system design related.