杨志民, 马永杰, 摆玉龙, 马义德. 采用0.13μm CMOS工艺开关电容ΔΣ调制器的设计和实现[J]. 云南大学学报(自然科学版), 2008, 30(4): 344-349.
引用本文: 杨志民, 马永杰, 摆玉龙, 马义德. 采用0.13μm CMOS工艺开关电容ΔΣ调制器的设计和实现[J]. 云南大学学报(自然科学版), 2008, 30(4): 344-349.
YANG Zhi-min, MA Yong-jie, BAI Yu-long, MA Yi-de. Design and realization of delta-sigma modulator with CMOS 0.13 μm technology[J]. Journal of Yunnan University: Natural Sciences Edition, 2008, 30(4): 344-349.
Citation: YANG Zhi-min, MA Yong-jie, BAI Yu-long, MA Yi-de. Design and realization of delta-sigma modulator with CMOS 0.13 μm technology[J]. Journal of Yunnan University: Natural Sciences Edition, 2008, 30(4): 344-349.

采用0.13μm CMOS工艺开关电容ΔΣ调制器的设计和实现

Design and realization of delta-sigma modulator with CMOS 0.13 μm technology

  • 摘要: 采用0.13μm CMOS工艺设计并实现了一个开关电容2阶ΔΣ调制器.该调制器能够将一个中心频率为455 kHz,带宽为10kHz的调幅信号转换成具有10位分辨率、信噪比为62dB的1位编码信号.在设计运算放大器时,充分考虑了短沟道晶体管设计的一些特殊要求,特别是考虑了MOS场效应管的输出电导gd这个非常敏感的设计参数.所设计电路的芯片的面积为260μm×370μm,工作电压为1.2 V.与其它的同类调制器相比,由于采用0.13μm CMOS工艺进行设计,因而芯片面积小,工作电压低.

     

    Abstract: A second-order switched-capacitor delta-sigma modulator is designed and realized in 0.13 μm CMOS technology.The modulator is suitable for transform a AM signal with central frequency of 455 kHz and bandwidth of 10 kHz into 1 bit coded signal with accuracy of 10bits and SNR of 62 dB.The chip area of the circuit is 260 μm×370 μm,power voltage is 1.2 V.Compared with other modulators,the circuit has advantages of low-voltage,small area witch benefit from the use of 0.13 μm CMOS technology.The circuit is simulated to show the correction of the design.

     

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